1. Field of the Invention
The present invention relates to a plasma display panel, and more particularly, to a protective layer of a plasma display panel.
2. Discussion of the Related Art
Plasma display panels comprise an upper panel, a lower panel, and barrier ribs formed between the upper and lower panels to define discharge cells. A major discharge gas, such as neon, helium or a mixed gas thereof, and an inert gas containing a small amount of xenon (Xe) are filled within the discharge cells. When a high-frequency voltage is applied to produce a discharge in the discharge cells, vacuum ultraviolet rays are generated from the inert gas to cause phosphors present between the barrier ribs to emit light, and as a result, images are created. Such plasma display panels have attracted more and more attention as next-generation display devices due to their small thickness and light weight.
FIG. 1 is a perspective view schematically showing the structure of a plasma display panel. As shown in FIG. 1, the plasma display panel comprises an upper panel 100 and a lower panel 110 integrally joined in parallel to and at a certain distance apart from the upper panel. The upper panel 100 includes an upper glass plate 101 as a display plane on which images are displayed and a plurality of sustain electrode pairs, each of which consists of a scan electrode 102 and a sustain electrode 103, arranged on the upper glass plate 101. The lower panel 110 includes a lower glass plate 111 and a plurality of address electrodes 113 arranged on the lower glass plate 111 so as to cross the plurality of sustain electrode pairs.
Stripe type (or well type, etc.) barrier ribs 112 for forming a plurality of discharge spaces, i.e. discharge cells, are arranged parallel to each other on the lower panel 110. A plurality of address electrodes 113, which act to perform an address discharge, are disposed in parallel with respect to the barrier ribs to generate vacuum ultraviolet rays. Red (R), green (G) and blue (B) phosphors 114 are applied to upper sides of the lower panel 110 to emit visible rays upon address discharge, and as a result, images are displayed. A lower dielectric layer 115 is formed between the address electrodes 113 and the phosphors 114 to protect the address electrodes 113.
An upper dielectric layer 104 is formed on the sustain electrode pairs 103, and a protective layer 105 is formed on the upper dielectric layer 104. The upper dielectric layer 104, which is included in the upper panel 100, is worn out due to the bombardment of positive (+) ions upon discharge of the plasma display panel. At this time, short circuiting of the electrodes may be caused by metal elements, such as sodium (Na). Thus, a magnesium oxide (MgO) thin film as the protective layer 105 is formed by coating to protect the upper dielectric layer 104. Magnesium oxide sufficiently withstands the bombardment of positive (+) ions and has a high secondary electron emission coefficient, thus achieving a low firing voltage.
However, the protective layer of the conventional plasma display panel has the following problems.
Firstly, since the magnesium oxide crystal particles constituting the protective layer have a non-uniform diameter, the density of the protective layer is lowered and the crystal is not sufficiently grown.
Secondly, since the magnesium oxide crystal particles constituting the protective layer have a non-uniform size, impurities, e.g., moisture and impurity gases, are attached to the surface of the protective layer. These impurities impede the discharge of the plasma display panel, and cause low contrast and high firing voltage of the plasma display panel, making the circuit structure complicated. This complicated circuit structure may incur considerable costs. Furthermore, the deterioration of the characteristics of the protective layer is intimately associated with the deterioration of jitter characteristics.